fixed-point digital, signal processor, LQFP-144, -0.3 V to 4.0 V Supply voltage, -0.3 V to 4.5 V Output voltage TMS320VC5402PGE100 absolute maximum ratings: (1)Supply voltage I/O range, DVDD: -0.3 V to 4.0 V; (2)Supply voltage core range, CVDD: -0.3 V to 2.4 V; (3)Input voltage range, VI: -0.3 V to 4.5 V; (4)Output voltage range, VO: -0.3 V to 4.5 V; (5)Operating case temperature range, TC: -40℃ to 100℃; (6)Storage temperature range, Tstg: -55℃ to 150℃.
TMS320VC5402PGE100 features: (1)Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus; (2)4K x 16-Bit On-Chip ROM; (3)16K x 16-Bit Dual-Access On-Chip RAM; (4)Single-Instruction-Repeat and Block-Repeat Operations for Program Code; (5)Block-Memory-Move Instructions for Efficient Program and Data Management; (6)Instructions With a 32-Bit Long Word Operand; (7)Instructions With Two- or Three-Operand Reads; (8)Arithmetic Instructions With Parallel Store and Parallel Load; (9)Conditional Store Instructions; (10)Fast Return From Interrupt; (11)CLKOUT Off Control to Disable CLKOUT.

The TMS320VC5402PGE100 fixed-point, digital signal processor (DSP) (hereafter referred to as the 5402 unless otherwise specified) is based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. This processor provides an arithmetic logic unit (ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The basis of the operational flexibility and speed of this DSP is a highly specialized instruction set.